1. Field of the Invention
The present invention relates to a power source fault detection apparatus, program, and method, more particularly relates to a fault detection apparatus, program, and method for detecting circuit trouble of a power supplier (DC/DC converter, hereinafter referred to as a “DDC”) due to voltage load fluctuations of a power source of a computer system.
2. Description of the Related Art
When mounting hardware in a conventional computer system, the DDC has been mounted a considerable distance from the memory, so to suppress fluctuations in the output voltage due to fluctuations in the load of the DDC due to the supply of current from the DDC to the memory, a capacitor has been arranged in the path between the DDC and memory. Therefore, even if supplying current from the DDC to the memory, the output voltage of the DDC would not fluctuate. For details, see Japanese Patent Publication (A) No. 60-65311.
However, in recent years, computer system hardware has been mounted at a higher density. As a result, the DDC has come to be mounted at a close distance from the memory and there is no longer space for mounting a capacitor between the memory and DDC. For this reason, if supplying current from the DDC to the memory, the output voltage has ended up fluctuating due to fluctuations in the load of the DDC. When fluctuations in the load of the DDC cause fluctuations in output voltage exceeding a predetermined threshold value, the DDC is judged to be defective and cannot be shipped out.